Nanoelectric memristor device with dilute magnetic semiconductors
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United States Patent and Trademark Office
Abstract
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A nanoelectric memristor device includes a first electrode and a layer of oxygen-vacancy-rich metal oxide deposited upon a surface of the first electrode. A layer of oxygen-rich/stochiometric metal oxide is deposited upon a surface of the oxygen-vacancy-rich metal oxide layer that is opposite from said first electrode. At least one of the oxygen-vacancy-rich metal oxide and oxygen-rich/stochiometric metal oxide layers is doped with one of a magnetic and a paramagnetic material. A second electrode is adjacent to a surface of the oxygen-rich/stochiometric metal oxide layer that is opposite from the oxygen-rich/stochiometric metal oxide layer.
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Keywords
257/537, 257/536, 257/E45.002, 257/E45.003